COM1031 - Computer Logic
- Created by: NiallJVS
- Created on: 22-01-16 14:02
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Clues
- 1. Timer1 Overflow Interrupt. 2. Timer1 Compare Match Interrupt 3. Input Capture Interrupt (8, 2, 10)
- A pointer to where the processor is up to in the execution of instructions. The memory address where the opcode is currently being executed and stored. (3, 7, 7, 2)
- Combine logic gates, output depends solely on the input states. (13, 5)
- DRAM (Dynamic RAM), SRAM (Static RAM), Non-Volatile RAM (9, 5, 2, 3)
- Interrupt vectors lowest in memory have priority over those higher in memory. (8, 2, 10)
- Interrupts of this type can be disabled. Such interrupts can be disabled when the processor is performing time critical operations. (8, 10)
- PROM (Programmable ROM), EPROM (Erasable Programmable ROM), Flash EPROM (i.e. memory stick). (9, 5, 2, 3)
- The finite time for a gate to respond to a change in the input signal(s). (11, 5)
- Typically contain RAM and ROM. Provide connections that may be used for control applications. May be regarded as a single chip computer that is programmed to perform a specific range of tasks. (16)
- X - R26+R27; Y - R28+R29; Z - R30+R31 (1, 1, 1, 8, 7)
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