fetch-decode-execute cycle

what does the program counter store?

the address of the next instruction

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In the fetch part of FDE cycle what bus does it use to collect data from the memory?

address bus

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what is the key difference between von Neumann and Harvard architecture?

Harvard uses two seperate buses for data and instructions

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what does MAR stand for?

memory address register

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What does the MAR do?

holds the memory location of data

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MBR

Memory Buffer Register

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what is the use of the mbr?

to temporarily store data whilst it's waiting to be processed

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what is the use of the ALU

where arithmetic and logic problems are performed

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Other cards in this set

In the fetch part of FDE cycle what bus does it use to collect data from the memory?

address bus

what is the key difference between von Neumann and Harvard architecture?

what does MAR stand for?

What does the MAR do?

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