fetch-decode-execute cycle

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1. What does the MAR do?

  • volatile memory
  • holds the memory location of data
  • buffers memory in the processor waiting to be executed
  • stores data under this register in the memory
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2. what does MAR stand for?

  • memory address register
  • major address register
  • main Arithmetic register
  • minor address register

3. In the fetch part of FDE cycle what bus does it use to collect data from the memory?

  • address bus
  • control bus
  • data bus
  • instruction bus

4. what is the use of the ALU

  • commands the entire CPU
  • where arithmetic and logic problems are performed
  • decodes data before executed
  • controls the data bus to regulate its network

5. what is the key difference between von Neumann and Harvard architecture?

  • von Neumman uses intel processors whilst Harvard use AMD
  • Harvard decodes the data in the main memory
  • Harvard uses two seperate buses for data and instructions
  • von neumann uses control buses


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