The address of the next instruction to be executed is copied from the RAM into the MAR.
The instruction held at the copied address, which is now in the MAR, is copied to the MBR.
At the same time as the last step, the value stored in the PC is incremented by 1.
The instruction(s) held in the MBR are copied to the CIR ready to be executed.
Execution phase (1)
The instruction stored in the CIR is decoded into a format that can be inputted into the CPU's logic circuits.
Execution phase (2)
The instruction held in the CIR is then executed through the CPU's logic circuits.
Program counter (PC) - This indicates the location in the CPU cache of the next instruction in the sequence. This is incremented after each fetch.
Memory address register (MAR) - this stores the addresses of instructions waiting to be fetched and executed.
Memory buffer register (MBR) - This is a buffer containing instructions waiting to be decoded and executed.
Current instruction register (CIR) - This is where the current instruction being executed is stored.