Sigma-Delta Modulation - week 8

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  • Sigma-Delta Modulation ADC
    • Over-samples and passes through a low resolution flash ADC
      • Uses noise shaping over successive steps to push quantitation noise out of the band
        • Digital filters are applied and then the signal is re-sampled at a lower rate
      • Flash (parallel) ADC
        • Usually 8 bit resolution
        • approximates values and quantises to 2^8 different values
        • Faster than SAR
    • Quantize the change between sample levels and uses a feedback loop to compare successive samples
      • A prediction is made based on the integration of the previous sample
        • The prediction error is calculated by how far off the prediction is
          • The prediction error is quantized and fed back into the loop
    • Integrated signal shows the prediction
      • This  passes through a 1 bit DAC which gives sigma (which reduces the delta modulation error)
        • Modulated signal is in 1 bit and shows the change
          • If the prediction is correct the modulation doesn't change
          • If the prediction is incorrect the modulation changes state
          • This signal has a high frequency noise which is removed in DAC with a low-pass filter
    • Disadvantages
      • Slope overload distortion
        • step-size is too small
          • Signal out of phase and reduced amplitude
      • Granular noise
        • step size is too big
          • Gives a staircase result in flat parts
    • Advantages
      • No peak clipping
      • Acceptable performance in many applications
    • Delta PCM
      • Step size is encoded as a code word in a multiple bit PCM signal
    • Differential PCM
      • Difference between prediction and sample (prediction error) is encoded as a code word in a multiple bit PCM signal
    • Adaptive delta
      • Step size increases at steep sections and decreases at flat section
  • Flash (parallel) ADC
    • Usually 8 bit resolution
    • approximates values and quantises to 2^8 different values
    • Faster than SAR
  • Successive-approximation register (SAR) ADC
    • Uses binary search to compare the input voltage with a range of voltages to narrow down approximation
    • Usually 16 bit resolution
    • Uses less power and cheaper than flash ADC
  • N bit converters take N steps
  • Delta PCM
    • Step size is encoded as a code word in a multiple bit PCM signal
  • Differential PCM
    • Difference between prediction and sample (prediction error) is encoded as a code word in a multiple bit PCM signal

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