CPU

?
  • Created by: CJMoseley
  • Created on: 28-06-16 13:17
View mindmap
  • CPU
    • The Control Unit (CU)
      • In control of the CPU.
      • Main Job = execute program instructions by following the fetch-decode-execute cycle.
      • Controls the flow of data inside the CPU and outside the CPU
        • registers, ALU, cache
        • main memory, input/output devices
    • The Arithmetic Logic Unit (ALU)
      • Does the calculations
      • Completes simple addition, subtraction and can do multiplication and division by repeating addition and subtraction
        • Compares the size of numbers
      • Performs logic operations such as AND, OR and NOT and binary shifts
    • The Cache
      • Very fast memory. Slower than registers but faster than RAM
      • Stores regularly used data so that the CPU can access it quickly
      • When CPU requests data, it checks the cache first, if its not in there, it will fetch it from the RAM
      • Very low capacity and are expensive compared to RAM and secondary storage
      • Different levels of cache memory - L1, L2, L3.
        • L2 is slower than L1 but can hold more
        • L1 is the quickest but has the lowest capacity
        • L3 is slower than L2 but can hold more
    • Fetch-Decode-Execute
      • 1. Copy memory address from the program counter to the MAR
        • Copy the instruction stored in the MAR address to the MDR
          • Increment (increase) the program counter to point to the address of the next instruction
            • The instruction in the MDR is decoded by the CU.
              • The CU may then prepare for the next step, e.g. by loading values into the MAR or MDR
                • The instruction is then performed.
                  • Fetch-Decode-Execute
                    • 1. Copy memory address from the program counter to the MAR
                      • Copy the instruction stored in the MAR address to the MDR
                        • Increment (increase) the program counter to point to the address of the next instruction
                          • The instruction in the MDR is decoded by the CU.
                            • The CU may then prepare for the next step, e.g. by loading values into the MAR or MDR
                              • The instruction is then performed.

    Comments

    No comments have yet been made

    Similar ICT resources:

    See all ICT resources »See all CPU resources »